Gate drive challenges
There are several key challenges to driving FET's. This is true whether it is GaN, MOS or SiC.
- Complexity: A simple solution is often the best solution. Keeping gate drive simple was a key motivator and our biggest challenge. Cumbersome additional components, isolated supplies and managing all of these is difficult when designing a gate drive circuit. Reduce component count and you will reduce complexity.
- CMTI: It's important to note that all the switch types (MOS, GaN and SiC) are improving their switching transition speeds in recent years. So the common mode transient immunity of the gate driver needs to be up to the challenge. Failure to meet this requirement will mean unexpected transitions on the FET gate and potential destructive events in a system.
- Propagation time: Delivering reliable gate drive signal and energy to the gate of any device is the first job of any gate driver. Delivering it with low propagation time from system controller to FET gate is even better. Low propagation time makes for tighter and easier 'dead-time' management between the ON and OFF cycles of the power FET's. This will directly result in improved system efficiency. Which will result in happy system designers!
- EMI: Electro-magnetic interference considerations are often the last thing to be thought about in a system design. This can make finishing a design difficult and time consuming. The reduction of components and circuits in and around the gate drive design helps dramatically reduce the EMI challenge in a system design. The reason being lower common-mode capacitance (Ccm). Reducing Ccm reduces circulating currents, reducing EMI difficulties in the system.
Heyday Technology has addressed and solved all of these challenges. The Heyday team has turned this technology into a reality resulting in a product line of isolated gate drivers fit for the most challenging designs and applications.